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Course Altera's Quartus II Software Design Series: Optimization[WDRS0027/CR/01]
Prerequisites Altera's Quartus II Software Desing Series: Foundation and Timing Analysis course are recommended to be completed before taking this course. The TimeQuest Timing Analyzer course is also recommended. See reference materials for links for free online training for the Foundation and TimeQuest courses.
Requal. Interval One Time Only
Contact Nicole Gee
Reference Material TimeQuest Timing Analyzer (free online training)
The Quartus II Software Design Series: Foundation (free online training)
Target Audience People using Quartus II w/ Altera software
Objective *Define physical region constraints for an FPGA design using LogicLock regions
*Manage user-defined design partitions using the Quartus II incremental compilation flow
*Apply incremental compilation to the top-down & bottom-up design flows
*Use Quartus II software settings to improve internal & I/O timing, reduce logic resource usage & lower power consumption
*Choose recommended HDL coding styles
*Run Design Space Explorer to select optimal setting for full or partial designs
Course Content Learn advanced features of the Quartus® II design software v.8.0 that will enable you to shorten your design cycle as well as improve your design performance and utilization. Use the incremental compilation flow and LogicLockż regions in the Quartus II software to reduce compile times and preserve performance on selected regions of your designs. Obtain your design goals in the area of performance, resource usage and power consumption by using design strategies, HDL coding styles and Quartus II software settings. Learn how to manage compile times effectively.
Instructor's Comments If you withdraw from the class 10 business days or fewer before it begins and do not find a replacement, you will be charged the full fee.